Open positions

  • Senior Integration Engineer, Video

    @ Central Europe (4 days/week, 1 day remote)

    Ensuring the quality rollout of an IP video platform to a new country. Responsible for ensuring the correct working functional and non-functional integration of the platform, liaising with Test and Architecture/R&D (including suppliers) as required, coming up with suggested changes and documenting options and decisions as required.

    hello@ovyo.com – ref. #GT05

  • Technical Programme Manager, Video

    @ London (5 days/week)

    Using your expertise of delivering various projects in the IP video space across the ecosystem, responsible for planning, stakeholder management, liaison with the technical team and ensuring the on-time delivery of various projects.

    hello@ovyo.com – ref. #UD01

  • Hardware Design Engineer, Chipsets

    @ Manchester (5 days/week)

    Utilise your in-depth experience with Verilog to impact the microarchitecture specifications of display processors, defining RTL specifications, design and logic implementation and front-end implementation tasks like synthesis, logic equivalence check and STA. Work closely with the verification teams.

    Knowledge required on ASIC/FGPA design methodology, IP signify methods especially timing/area/complexity trade-offs, AMBA, Perl, Tcl, C shell, MATLAB.

    hello@ovyo.com – ref. #UT01

  • Technical Programme Manager, Video

    @ Central Europe (4 days/week, 1 day remote)

    Leading the rollout of an IP video platform to a new country. Responsible for planning, stakeholder management, oversight of technical team and reporting, all adding up to ensuring the on-time delivery of this exciting project.

    hello@ovyo.com – ref. #GD01